The microprocessor has a program memory footprint that Matsushita claims is 50 percent to 80 percent smaller than other architectures because of its AM33 instruction set. The processor has a ...
A team of engineers at Fudan University has successfully designed, built and run a 32-bit RISC-V microprocessor that uses molybdenum disulfide instead of silicon as its semiconductor component. Their ...
While ARM continues to make inroads into the personal computing market against traditional chip makers like Intel and AMD, it’s not a perfect architecture and does have some disadvantages. While it’s ...
A new technical paper titled “Bendable non-silicon RISC-V microprocessor” was published by researchers at Pragmatic Semiconductor, Qamcom, and Harvard University. From the abstract: “Here we present ...
In the world of advanced technology and exploration, some missions take us where ordinary microprocessors cannot dare to go. Whether exploring the depths of space or operating in avionics, the ...
Remember how I said that Moore's Law is "the full-employment act for computer pundits"? In the smaller niche of microprocessor journalism, there used to be another topic that was always good for a ...
For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...
The Milk-V Meles is a single-board computer that could easily be mistaken for a Raspberry Pi Model B. It’s the same size and has a similar set of ports. But instead of an ARM-based processor, the ...
A group of prominent chipmakers is forming a new venture to broaden the adoption of the RISC-V processor architecture. The venture, which was unveiled by its backers this morning, will initially focus ...
A new technical paper titled “RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures” was published by researchers at Politecnico di Torino (Italy), Univerity of Tor Vergata (Italy), and ...
Researchers point to a microprocessor on a space-ready motherboard used in spaceflight applications. SwRI is evaluating reduced instruction set computers (RISC-V or “risk five”) and Advanced RISC ...
This paper presents a new hardware/software partitioning methodology for SoCs. Target architecture is composed of a RISC host and one or more configurable microprocessors. First, a system is ...